1. Field of the Invention
The present invention relates to an application specific semiconductor memory device having multi-ports for graphics application, for example, and, in particular, to a semiconductor memory device having a random access port and a serial access port for storing graphics data, for high speed input and output operations synchronized with a clock signal.
2. Description of the Prior Art
FIG. 1 is a block diagram illustrating a multiport VRAM, for example, a multiport video memory (VRAM) 20 which is one type of conventional multiport semiconductor memory device used for storing graphics data. Normally, as shown in the drawing, two ports are provided, specifically, a random access (RAM) port and a serial access (SAM) port. The RAM port is connected with a processor (omitted from the drawing) via a data bus for exchanging computing data with a memory cell array 23 in the same manner as for a conventional standard DRAM.
The SAM port outputs graphics data transmitted from the memory cell array 23 to a RAMDAC (omitted from the drawing), converts this data to an RGB analogue video signal, and displays this signal on a display device.
The RAM port is mainly used for high speed transmission of data to the CPU in the above manner.
The SAM port, on the other hand, is mainly used for transmission of display data to the display device. In addition, the VRAM 20 has the exclusive function for operating a write per bit (writing operation per bit), block-write (writing operation per block), flash-write (writing operation per row address), RAM-SAM (read, write, sprite) transfer operation, and the like to provide high speed image processing. The use of this type of memory makes it possible to provide a graphic system with a significantly improved performance as compared with the case of a conventional standard DRAM with a single port.
However, there has recently been a conspicuous improvement in the performance of computer systems, particularly in the field of work station applications.
There are strong requirements for improvement of the performance of the VRAMs applied in this field, and for provision of large volume memory. However, there are many problem areas existing at the present time which must be improved to achieve these requirements.
Examples are as follows:
(1) The upper limit to the access speed through the RAM port in VRAM is 60 to 70 ns and the cycle time ranges from 100 to 120 ns, the same as the performance of a standard DRAM. Also, a page mode operation function is used for a high speed cycle time, but in such a case as well the upper limit to the cycle time is 40 to 50 ns.
(2) The upper limit to the speed through the SAM port in VRAM is 20 to 30 ns, which differs from the display rate. Accordingly, at the present time high speed is attained by arranging several devices in parallel and converting the outputs from parallel to series. However, it is not possible to increase the number of bits connected to one I/O port in order to preset the number of bits in the display. There is therefore no way of obtaining large volume other than by increasing the number of I/O ports. Accordingly, at the present time the I/O ports are allotted in the direction of the plane in the graphic display.
(3) The increase in the number of I/O ports is limited to the number of pins in a package. When an I/O port comprises 16 bits, two ports require 32 I/O pins. A total of 64 pins is therefore necessary for the two ports, addressing pins and control pins. The 64 pins are maximum number under present packaging technology for a reasonable packaging size.
(4) Increasing the number of I/O ports causes an increase in output noise. It is therefore difficult to provide an I/O port of more than 32 bits because two I/O ports are made up of 64 I/O pins. This is a problem.
(5) Because the two ports, specifically the RAM port and the SAM port, operate asynchronously, it is difficult to avoid the effects of operating noise generated inside the VRAM and of output noise generated by many I/O pins.
For this reason, it is difficult to attain a further increase in bit capacity and high speed operation. There are many such difficulties related to the areas of increased capacity and speed of present VRAMs. Therefore, future application development faces those kinds of problem.